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ADV7401
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All specifications obtained using programming scripts with the following sequence included: Addr 0x0E - data 0x80, Addr 0x54 - data 0x00, Addr 0x0E - data 0x00.
All ADC linearity tests performed at input range of full scale – 12.5%, and at zero scale + 12.5%.
Max INL and DNL specifications obtained with part configured for component video input.
Specification for ADV7401BSTZ-110 and ADV7401KSTZ-140 only.
Specification for ADV7401KSTZ-140 only.
Guaranteed by characterization.
To obtain specified V IH level on Pin 38, Register 0x13 (wo) must be programmed with value 0x04. If Register 0x13 is programmed with value 0x00,
then V IH on Pin 38 = 1.2 V.
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To obtain specified V IL level on Pin 38, Register 0x13 (wo) must be programmed with value 0x04. If Register 0x13 is programmed with value 0x00,
then V IL on Pin 38 = 0.4 V.
Pins 1, 2, 13, 14, 16, 19, 24, 29, 30, 31, 32, 33, 34, 35, 45, 79, 83, 84, 87, 88, 95, 96, 97, 100.
V OH and V OL levels obtained using default drive strength value (0xD5) in Register Subaddress 0xF4.
Pins 3, 13, 14, 19, 24, 29, 30, 31, 32, 33, 34, 45.
Analog current measurements for CVBS made with ADC0 powered up only, For RGB, ADC0, ADC1 and ADC2 powered up only, for SCART FB, all ADCs powered up.
Rev. B | Page 5 of 20
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